Avaya S8700 Series, Maintenance Manual

Page: 2246 / 2618

Maintenance-Object Repair Procedures
555-233-143 8-1524 Issue 1 May 2002
Notes to Facility Fault Sectionalization Flowchart
1. Loop transmit to receive on the system side.
Remove the transmit signal from the TN722, TN767, or TN464 circuit pack
inputs and outputs and loop it around to the receive signal going toward the
TN722, TN767, or TN464 circuit pack at the first unit wired to the TN722,
TN767, or TN464 circuit pack.
The loop-around signal may take different forms depending on the
installation.
■
In some cases, the unit connected to the system may provide a
switch or a terminal interface to control the desired loop around.
Make sure that the signal is looped toward the system and that the
timing signal is looped.
■
In most cases, it may be necessary to temporarily rewire
connections at the cross-connect fields to loop the signal back
toward the switch.
The point at which the signal is looped should be one at which physical
access is easy and where the signal level is within the line compensation
(i.e. equalization) range of the hardware connected. A few cases exist
where access to the loop around cannot be easily provided at locations
where the signal level is within the line compensation range of the
hardware. The line compensation can be changed via the change ds1
UUCSS command.
2. Execute the test board UUCSS command for the TN722, TN767 or
TN464. Look at results of Test #144, the Slip Alarm Inquiry test. When this
test fails, the error code gives the number of slips detected since the last
Slip Inquiry test was run. If the test fails, run it at least one more time to
ensure that slips have occurred since the loop around was installed.
Timing Loops
A timing loop exists whenever a system receives timing from another system
whose timing reference is directly or indirectly derived from itself. The system
synchronization planner must avoid creating a timing loop when administering the
synchronization references in a system. Timing loops can lead to loss of digital
data between systems that are exchanging data with any system within the loop.
An invalid timing signal will also be generated by any system within the loop, thus
propagating the invalid timing signal to any system(s) using a system within the
loop as a synchronization reference.