Avaya S8700 Series, Maintenance Manual

Page: 1015 / 2618

ATM-TRK (Circuit Emulation Service Circuit Pack)
Issue 1 May 2002 8-293 555-233-143
ATM Board Framer Loop-Around Test (#1260)
Destructive
This test verifies the board’s circuit (Time Division Multiplexing) and packet paths
using an on-board, dummy virtual circuit. Before running the test, you must
■
busyout the ATM-TRK circuit pack (busyout board UUCSS) and
■
switch synchronization (change synchronization) from the ATM-TRK
circuit pack
If the ATM-TRK circuit pack is supplying synchronization, the test aborts.
The test sends a digital counter from one of the Tone Generators via one of the
TDM bus time slots. The ATM framer interface converts this digital counter to
ATM cells and loops them back internally. The ATM-TRK circuit pack converts the
cells back to a digital counter and sends it to the tone receiver for verification. If
the circuit pack passes the circuit check, the software checks the packet path by
sending a packet from the packet-interface circuit pack to the ATM-TRK circuit
pack via the ATM protocol stack.
22 High-level path alarm indication signal
23 High-level path remote defect indicator
24 Loss of cell delineation
25 Uncorrectable headers sent by the ATM switch
26 Too many cells with invalid VPI/VCI combination
27 The signaling link between the board and the ATM switch is down.
34 Excessive AAL-5 retransmission requests - per VC
35 Excessive LAP-D retransmission requests - per VC
37 ATM CLP (cell loss priority) bit – see MO ‘‘ATM-NTWK (ATM Network Error)’’
38 ATM congestion indicator – see MO ‘‘ATM-NTWK (ATM Network Error)’’
39 ATM cell underrun – see MO ‘‘ATM-NTWK (ATM Network Error)’’
40 ATM cell overrun – see MO ‘‘ATM-NTWK (ATM Network Error)’’
41 Lost ATM cells – see MO ‘‘ATM-NTWK (ATM Network Error)’’
Table 8-128. Aux Data YY for ATM Board Error Query Test (#1259)
If YY= Then
Continued on next page