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Chapter 8
DMA Controller (DMAC)
Preliminary User’s Manual U17566EE1V2UM00
Figure 8-1
Buffer register configuration
8.5 Transfer Type
All DMA transfers of this microcontroller are two-cycle transfers.
In two-cycle transfer, data transfer is performed in two cycles: a read cycle
(source to DMAC) and a write cycle (DMAC to destination).
In the first cycle, the source address is output and reading is performed from
the source to the DMAC. In the second cycle, the transfer destination address
is output and writing is performed from the DMAC to the transfer destination.
8.6 Transfer Object
The following transfer objects can be specified as source and destination:
Table 8-2
Transfer objects
Data read
Data write
Master
register
Slave
register
Address/
count
controller
Internal bus
Source \
Destination
Internal RAM
Peripherals
Internal RAM
–
√
Peripherals
√
√
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