304
Chapter 7
Bus and Memory Control (BCU, MEMC)
Preliminary User’s Manual U17566EE1V2UM00
(3)
Word access (32 bits)
(a) Little endian
Figure 7-37
Access to address 4n
Figure 7-38
Access to address 4n + 1
7
0
7
0
Word data
15
8
External
data bus
4n
Address
15
8
4n + 1
23
16
31
24
7
0
7
0
Word data
15
8
External
data bus
4n + 2
Address
15
8
4n + 3
23
16
31
24
1-st Access
2-nd Access
7
0
7
0
Word data
15
8
External
data bus
Address
15
8
4n + 1
23
16
31
24
7
0
7
0
Word data
15
8
External
data bus
4n + 2
Address
15
8
4n + 3
23
16
31
24
7
0
7
0
Word data
15
8
External
data bus
4n + 4
Address
15
8
23
16
31
24
1-st Access
2-nd Access
3-rd Access
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