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A/D Converter (ADC)
Chapter 20
Preliminary User’s Manual U17566EE1V2UM00
20.2 Configuration
The A/D Converter includes the following hardware.
Caution
It is mandatory to enable the A/D Converter after any reset and to perform a
first conversion within a time period of maximum 1 s after reset release. With
the execution of the first conversion, the A/D Converter circuit is initialized.
The execution of a first conversion is mandatory independently of whether the
A/D Converter is used later on by the user application.
(1)
Successive approximation register (SAR)
The SAR register compares the voltage value of the analog input signal with
the voltage tap (compare voltage) value from the series resistor string, and
holds the comparison result starting from the most significant bit (MSB).
When the comparison result has been held down to the least significant bit
(LSB) (i.e., when A/D conversion is complete), the contents of the SAR register
are transferred to the ADCR0n register.
(2)
A/D conversion result register n (ADCR0n), A/D conversion result
register nH (ADCR0Hn)
The ADCR0n register is a 16-bit register that stores the A/D conversion result.
ADCR0n consist of 16 registers and the A/D conversion result is stored in the
10 higher bits of the ADCR0n register corresponding to analog input. (The
lower 6 bits are fixed to 0.)
The ADCR0n register is read-only, in 16-bit units.
When using only the higher 8 bits of the A/D conversion result, the ADCR0Hn
register is read-only, in 8-bit units.
Caution
A write operation to the ADA0M0 and ADA0S registers may cause the contents
of the ADCR0n register to become undefined. After the conversion, read the
conversion result before writing to the ADA0M0 and ADA0S registers. Correct
conversion results may not be read if a sequence other than the above is used.
Table 20-1
Configuration of A/D Converter
Item
Configuration
Analog inputs
ANI0 to ANIn pins
Registers
Successive approximation register (SAR)
A/D conversion result registers ADCR00 to ADCR0n
A/D conversion result registers ADCR0H0 to ADCR0Hn: only higher 8 bits can be
read
Control registers
A/D Converter mode registers 0 to 2 (ADA0M0 to ADA0M2)
A/D Converter channel specification register 0 (ADA0S)
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