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Chapter 11
16-bit Timer/Event Counter P (TMP)
Preliminary User’s Manual U17566EE1V2UM00
(2)
TPnCTL1 - TMPn control register 1
The TPnCTL1 register is an 8-bit register that controls the operation of TMPn.
Access
This register can be read/written in 8-bit or 1-bit units.
Address
<base> + 1
H
Initial Value
00
H
. This register is initialized by any reset.
Caution
1.
The TPnEST bit is valid only in the external trigger pulse output mode or
one-shot pulse output mode. In any other mode, writing 1 to this bit is
ignored.
2.
External event count input is selected in the external event count mode
regardless of the value of the TPnEEE bit.
7
6
5
4
3
2
1
0
0
TPnEST
TPnEEE
0
0
TPnMD2
TPnMD1
TPnMD0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 11-4
TPnCTL1 register contents
Bit position
Bit name
Function
6
TPnEST
Software trigger control.
0: –
1: Generate a valid signal for external trigger input.
•
In one-shot pulse output mode:
A one-shot pulse is output with writing 1 to the TPnEST bit as the trigger.
•
In external trigger pulse output mode:
A PWM waveform is output with writing 1 to the TPnEST bit as the trigger.
5
TPnEEE
Count clock selection:
0: Disable operation with external event count input.
(Perform counting with the count clock selected by the TPnCTL0.TPnCK0 to
TPnCK2 bits.)
1: Enable operation with external event count input.
(Perform counting at the valid edge of the external event count input signal.)
The TPnEEE bit selects whether counting is performed with the internal count
clock or the valid edge of the external event count input.
2 to 0
TPnMD[2:0]
Timer mode selection:
TPnMD2
TPnMD1
TPnMD0
Timer mode
0
0
0
Interval timer
0
0
1
External event count
0
1
0
External trigger pulse output
0
1
1
One-shot pulse output
1
0
0
PWM output
1
0
1
Free-runnning timer
1
1
0
Pulse width measurement
1
1
1
Setting prohibited
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