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Chapter 7
Bus and Memory Control (BCU, MEMC)
Preliminary User’s Manual U17566EE1V2UM00
7.3 Registers
Access to on-chip peripherals, to external memory, and to external I/O is
controlled and operated by registers of the Bus Control Unit (BCU) and of the
Memory Controller (MEMC):
Table 7-6
Bus and memory control register overview
Module
Register name
Shortcut
Address
Bus Control Unit (BCU)
Peripheral area selection control register
BPC
FFFF F064
H
Internal peripheral function wait control
register
VSWC
FFFF F06E
H
Chip area select control registers
CSC0
FFFF F060
H
CSC1
FFFF F062
H
Endian configuration register
BEC
FFFF F068
H
µPD70F3427 only:
Memory Controller
(MEMC)
Bus cycle configuration registers
BCT0
FFFF F480
H
BCT1
FFFF F482
H
Address setup wait control register
ASC
FFFF F48A
H
Local bus size configuration register
LBS
FFFF F48E
H
Data wait control registers
DWC0
FFFF F484
H
DWC1
FFFF F486
H
Bus cycle control register
BCC
FFFF F488
H
Read delay control register
RDDLY
FFFF FF00
H
Page ROM configuration register
PRC
FFFF F49A
H
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