287
Bus and Memory Control (BCU, MEMC)
Chapter 7
Preliminary User’s Manual U17566EE1V2UM00
7.6.2
Reading from external devices
This section shows typical sequences of reading data from external devices.
(1)
Read with external wait cycle
Figure 7-13
Timing: read data
Register settings:
• BCTm.BTk0 = 0 (connected external device is SRAM or external I/O)
• ASC.ACk[1:0] = 00
B
(no address setup wait states inserted)
• DWCm.DWk[2:0] = 000
B
(no programmable data wait states inserted)
• BCC.BCk[1:0] = 00
B
(no idle states inserted)
Note
1.
The circles indicate the sampling timing.
2.
The broken line indicates the high-impedance state (bus is not driven).
T1
Addre
ss
D
a
t
a
WAIT (inp
u
t)
D[
3
1:0] (I/O)
WR (o
u
tp
u
t)
RD (o
u
tp
u
t)
C
S
k (o
u
tp
u
t)
A[2
3
:0] (o
u
tp
u
t)
BCLK
D
a
t
a
Addre
ss
TW
T1
T2
T2
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