592
Chapter 18
I
2
C Bus (IIC)
Preliminary User’s Manual U17566EE1V2UM00
(8)
IICn - IICn shift registers
The IICn registers are used for serial transmission/reception (shift operations)
synchronized with the serial clock.
A wait state is released by writing the IICn register during the wait period, and
data transfer is started.
Access
This register can be read/written in 8-bit units.
Data should not be written to the IICn register during a data transfer.
Address
<base>
Initial Value
00
H
. This register is cleared by any reset.
(9)
SVAn - IICn slave address registers
The SVAn registers hold the I
2
C bus’s slave addresses.
Access
This register can be read/written in 8-bit units.
Bit 0 should be fixed to 0.
Address
<base> + 3
H
Initial Value
00
H
. This register is cleared by any reset.
7
6
5
4
3
2
1
0
Input/output data
R/W
7
6
5
4
3
2
1
0
Slave address
R/W
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