296
Chapter 7
Bus and Memory Control (BCU, MEMC)
Preliminary User’s Manual U17566EE1V2UM00
7.8 Data Access Order
7.8.1
Access to 8-bit data busses
This section shows how byte, half word and word accesses are performed for
an 8-bit data bus.
(1)
Byte access (8 bits)
(a) Little endian
Figure 7-21
Left: Access to even address (2n)
Right: Access to odd address (2n + 1)
(b) Big endian
Figure 7-22
Left: Access to even address (2n)
Right: Access to odd address (2n + 1)
7
0
7
0
Byte data
External
data bus
2n
Address
7
0
7
0
Byte data
External
data bus
2n + 1
Address
7
0
7
0
Byte data
External
data bus
2n
Address
7
0
7
0
Byte data
External
data bus
2n + 1
Address
electronic components distributor