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Asynchronous Serial Interface (UARTA)
Chapter 16
Preliminary User’s Manual U17566EE1V2UM00
(1)
UARTAn control register 0 (UAnCTL0)
The UAnCTL0 register is an 8-bit register used to specify the UARTAn
operation.
(2)
UARTAn control register 1 (UAnCTL1)
The UAnCTL1 register is an 8-bit register used to select the input clock for the
UARTAn.
(3)
UARTAn control register 2 (UAnCTL2)
The UAnCTL2 register is an 8-bit register used to control the baud rate for the
UARTAn.
(4)
UARTAn option control register 0 (UAnOPT0)
The UAnOPT0 register is an 8-bit register used to control serial transfer for the
UARTAn.
(5)
UARTAn status register (UAnSTR)
The UAnSTRn register consists of flags indicating the error contents when a
reception error occurs. Each one of the reception error flags is set (to 1) upon
occurrence of a reception error and is reset (to 0) by reading the UAnSTR
register.
(6)
UARTAn receive shift register
This is a shift register used to convert the serial data input to the RXDAn pin
into parallel data. Upon reception of 1 byte of data and detection of the stop bit,
the receive data is transferred to the UAnRX register.
This register cannot be manipulated directly.
(7)
UARTAn receive data register (UAnRX)
The UAnRX register is an 8-bit register that holds receive data. When
7 characters are received, 0 is stored in the highest bit (when data is received
LSB first).
In the reception enabled status, receive data is transferred from the UARTAn
receive shift register to the UAnRX register in synchronization with the
completion of shift-in processing of 1 frame.
Transfer to the UAnRX register also causes the reception complete interrupt
request signal (INTUAnR) to be output.
(8)
UARTAn transmit shift register
The transmit shift register is a shift register used to convert the parallel data
transferred from the UAnTX register into serial data.
When 1 byte of data is transferred from the UAnTX register, the shift register
data is output from the TXDAn pin.
This register cannot be manipulated directly.
(9)
UARTAn transmit data register (UAnTX)
The UAnTX register is an 8-bit transmit data buffer. Transmission starts when
transmit data is written to the UAnTX register. When data can be written to the
UAnTX register (when data of one frame is transferred from the UAnTX
register to the UARTAn transmit shift register), the transmission enable
interrupt request signal (INTUAnT) is generated.
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