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Chapter 11
16-bit Timer/Event Counter P (TMP)
Preliminary User’s Manual U17566EE1V2UM00
(6)
Selector
This selector selects the count clock for the 16-bit counter. Eight types of
internal clocks or an external event can be selected as the count clock.
11.4 TMP Registers
The TMPn are controlled and operated by means of the following registers:
Table 11-1
TMPn registers overview
Register name
Shortcut
Address
TMPn control registers 0
TPnCTL0
<base>
TMPn control registers 1
TPnCTL1
<base> + 1
H
TMPn I/O control register 0
TPnIOC0
<base> + 2
H
TMPn I/O control register 1
TPnIOC1
<base> + 3
H
TMPn I/O control register 2
TPnIOC2
<base> + 4
H
TMPn option registers 0
TPnOPT0
<base> + 5
H
TMPn capture/compare registers 0
TPnCCR0
<base> + 6
H
TMPn capture/compare registers 1
TPnCCR1
<base> + 8
H
TMPn counter read buffer register
TPnCNT
<base> + A
H
Table 11-2
CSIBn register base address
Timer
Base address
TMP0
FFFF F660
H
TMP1
FFFF F670
H
TMP2
FFFF F680
H
TMP3
FFFF F690
H
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