489
Watch Timer (WT)
Chapter 14
Preliminary User’s Manual U17566EE1V2UM00
(1)
TMC00 - WCT mode control register
The 8-bit TMC00 register controls the operation of the WCT.
Access
This register can be read/written in 8-bit or 1-bit units.
Address
<base> + 6
H
Initial Value
00
H
. This register is cleared by any reset.
Note
1.
If an attempt is made to change the setting of TMC00[3:2] while the timer is
running, these bits are cleared and the timer is stopped. When the timer is
stopped, you can change the operation mode.
2.
The OVF00 bit is set when the counter reaches FFFF
H
and once more
when the counter continues with 0000
H
. Clearing OVF00 within that time
has no effect.
7
6
5
4
3
2
1
0
0
0
0
0
TMC003
TMC002
0
OVF00
R
R
R
R
R/W
R/W
R
R/W
Table 14-7
TMC00 register contents
Bit position
Bit name
Function
3 to 2
TMC00[3:2] Operation mode selection:
TMC003 TMC002 Operating mode
0
0
Stop mode
0
1
Free-running mode. Generates interrupt on match
between TM00 and CR000.
1
0
INTWT0UV interval measurement mode with restart of
TM00. Generates interrupt with valid edge of INTWT0UV.
1
1
Setting prohibited.
0
OVF00
Counter overflow indicator:
0: No overflow
1: Overflow occurred
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