586
Chapter 18
I
2
C Bus (IIC)
Preliminary User’s Manual U17566EE1V2UM00
(3)
IICFn - IICn flag registers
The registers set the I
2
Cn operation mode and indicate the I
2
C bus status.
Access
This register can be read/written in 8-bit or 1-bit units.
STCFn and IICBSYn bits are read-only.
Address
<base> + A
H
Initial Value
00
H
. This register is cleared by any reset.
IICRSVn enables/disables the communication reservation function.
The initial value of the IICBSYn bit is set by using the STCENn bit (see
“Cautions“ on page 624
).
The IICRSVn and STCENn bits can be written only when operation of I
2
Cn is
disabled (IICCn.IICEn = 0). After operation is enabled, IICFn can be read.
7
6
5
4
3
2
1
0
STCFn
IICBSYn
0
0
0
0
STCENn IICRSVn
R
R
R/W
R/W
R/W
R/W
R/W
R/W
STCFn
STTn clear
0
Start condition issued
1
Start condition cannot be issued, STTn bit cleared
Condition for clearing (STCFn = 0)
Condition for setting (STCFn = 1)
•
Cleared by IICCn.STTn = 1
•
After reset
•
When start condition is not issued and STTn flag
is cleared during communication reservation is
disabled (IICRSVn = 1).
IICBSYn
I
2
Cn bus status
0
Bus released status
1
Bus communication status
Condition for clearing (IICBSYn = 0)
Condition for setting (IICBSYn = 1)
•
When stop condition is detected
•
After reset
•
When start condition is detected
•
By setting the IICCn.IICEn bit when the STCENn =
0
STCENn
Initial start enable trigger
0
Start conditions cannot be generated until a stop condition is detected following operation enable
(IICEn bit = 1).
1
Start conditions can be generated even if a stop condition is not detected following operation
enable (IICEn = 1).
Condition for clearing (STCENn = 0)
Condition for setting (STCENn = 1)
•
When start condition is detected
•
After reset
•
Setting by instruction
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