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16-bit Timer/Event Counter P (TMP)
Chapter 11
Preliminary User’s Manual U17566EE1V2UM00
11.6 Operating Precautions
11.6.1
Capture operation in pulse width measurement and free-
running mode
When the capture operation is used in pulse width measurement or free-run-
ning mode the first captured counter value of the capture registers TPnCCR0/
TPnCCR, i.e. after the timer is enabled (TPnCTL0.TPnCE = 1), may be FFFF
H
instead of 0000
H
if the chosen count clock of the TMP is not the maximum, i.e.
if TPnCTL0.TPnCKS[2:0]
≠
0.
11.6.2
Count jitter for PCLK4 to PCLK7 count clocks
When specifying PCLK4 to PCLK7 as the count clock, a jitter of maximum
± 1 period of PCLK0 may be applied to the counter’s count clock input.
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