256
Chapter 7
Bus and Memory Control (BCU, MEMC)
Preliminary User’s Manual U17566EE1V2UM00
(2)
Programmable peripheral I/O area (PPA)
The usage and the address range of the PPA is configurable. The PPA extends
the fixed peripheral I/O area and assigns an additional 12 KB address space
for accessing on-chip peripherals.
The figure below illustrates the programmable peripheral I/O area (PPA).
Figure 7-4
Programmable peripheral I/O area
The CAN modules registers and message buffers are allocated to the PPA.
Refer to
“CAN module register and message buffer addresses” on page 666
for information how the calculate the register and message buffer addresses of
the CAN modules.
Caution
If the programmable peripheral I/O area overlaps one of the following areas,
the programmable peripheral I/O area becomes ineffective:
•
Peripheral I/O area
•
ROM area
•
RAM area
Note
1.
The
fixed
peripheral I/O area is mirrored to the upper 4 KB of the
programmable
peripheral I/O area – regardless of the base address of the
PPA. If data is written in one area, data having the same contents is also
written in the other area.
2.
All address definitions in this manual that refer to the programmable
peripheral area assume that the base address of the PPA is 03FE C000
H
,
that means BPC = 8FFB
H
.
3
FF FFFFH
3
FF F000H
3
FF EFFFH
bas
e +
3
FFFH
bas
e of PPA
x
3
FFFH
x
3
000H
x2FFFH
x0000H
x11FFH
000 0000H
Peripher
a
l
I/O regi
s
ter
Progr
a
mm
ab
le
peripher
a
l
I/O regi
s
ter
NPB (NEC Periher
a
l B
us
)
Dedic
a
ted
a
re
a
for
FCAN controller
Peripher
a
l
I/O
a
re
a
Progr
a
mm
ab
le
peripher
a
l
I/O
a
re
a
x1200H
(4 KB)
(16 KB)
(4 KB)
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me
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