799
Stepper Motor Controller/Driver (Stepper-C/D)
Chapter 21
Preliminary User’s Manual U17566EE1V2UM00
(1)
MCNTCn0, MCNTCn1 - Timer mode control registers
The 8-bit MCNTCnm registers control the operation of the free running up
counters CNTm.
Access
These registers can be read/written in 8-bit or 1-bit units.
Address
MCNTCn0: <base>
MCNTCn1: <base> + 14
H
Initial Value
00
H
. This register is cleared by any reset.
7
6
5
4
3
2
1
0
CAE
a
a)
Bit CAE refers only to register MCNTCn0. In register MCNTCn1, this bit is set to 0.
0
FULL
PCE
0
SMCL2
SMCL1
SMCL0
R/W
b
b)
In register MCNTCn0, this bit is read only (R)
R
R/W
R/W
R
R/W
R/W
R/W
Table 21-3
MCNTCnm register contents
Bit position
Bit name
Function
7
CAE
a
a)
Bit CAE refers only to register MCNTCn0. In register MCNTCn1, this bit is set to 0.
Stepper Motor Controller/Driver control
0: Stepper Motor Controller/Driver operation is disabled.
1: Stepper Motor Controller/Driver operation is enabled.
This bit switches both Stepper Motor Controller/Driver 0 and Stepper Motor
Controller/Driver 1.
5
FULL
Sets the count range of the timer counter
0: count range from 01
H
to FF
H
1: count range from 00
H
to FF
H
The initial start value is 00
H
in both cases. For the impact of this bit on duty factor
and PWM cycle time, see also
“Duty Factor“ on page 804
.
4
PCE
Timer operation control
0: Timer counteris stopped.
1: Timer counter is enabled.
2 to 0
SMCL[2:0]
Sets the timer count clock for the timer counter
SMCL2
SMCL1
SMCL0
Selected timer count clock
0
0
0
SPCLK1
0
0
1
SPCLK1 / 2
0
1
0
SPCLK1 / 4
0
1
1
SPCLK1 / 8
1
0
0
SPCLK1 / 16
1
0
1
SPCLK1 / 32
1
1
0
SPCLK1 / 64
1
1
1
SPCLK1 / 128
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