GigaDevice Semiconductor GD32F20 Series, User Manual

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GD32F20x User Manual
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multiples of a fundamental reference frequency of 3 ~ 25 MHz.
The PLL has three input clock sources: IRC8M/2 or HXTAL or PLL1. It can be choosed one
of them as the input clock source of the PLL.
The PLL can be switched on or off by using the PLLEN bit in the RCU_CTL register. The
PLLSTB flag in the RCU_CTL register will indicate if the PLL clock is stable. An interrupt can
be generated if the related interrupt enable bit, PLLSTBIE, in the RCU_INT register, is set as
the PLL becomes stable
The PLL1 can be switched on or off by using the PLL1EN bit in the RCU_CTL register. The
PLL1STB flag in the RCU_CTL Register will indicate if the PLL1 clock is stable. An interrupt
can be generated if the related interrupt enable bit, PLL1STBIE, in the RCU_INT register, is
set as the PLL1 becomes stable.
The PLL2 can be switched on or off by using the PLL2EN bit in the RCU_CTL register. The
PLL2STB flag in the RCU_CTL register will indicate if the PLL2 clock is stable. An interrupt
can be generated if the related interrupt enable bit, PLL2STBIE, in the RCU_INT register, is
set as the PLL2 becomes stable.
The three PLLs are closed by hardware when entering the Deepsleep/Standby mode or
HXTAL monitor fail when HXTAL used as the source clock of the PLLs.
The input clock source of PLL1 and PLL2 is obtained by HXTAL. It can be configured by
PLL2MF[3:0], PLL1MF[3:0] and PREDV1[3:0] bits in the configuration register 1(RCU_CFG1).
Low speed crystal oscillator (LXTAL)
The low speed external crystal or ceramic resonator oscillator, which has a frequency of
32,768 Hz, produces a low power but highly accurate clock source for the Real Time Clock
circuit. The LXTAL oscillator can be switched on or off by setting the LXTALEN bit in the
backup domain control register RCU_BDCTL. The LXTALSTB flag in the backup domain
control register RCU_BDCTL will indicate if the LXTAL clock is stable. An interrupt can be
generated if the related interrupt enable bit, LXTALSTBIE, in the Interrupt register RCU_INT
is set when the LXTAL becomes stable.
Select external clock bypass mode by setting the LXTALBPS and LXTALEN bits in the backup
domain control register (RCU_BDCTL). The CK_LXTAL is equal to the external clock which
drives the OSC32IN pin.
Internal 40 RC oscillator (IRC40K)
The internal RC oscillator has a frequency of about 40 kHz and is a low power clock source
for the Real Time Clock circuit or the Free Watchdog Timer. The IRC40K offers a low cost
clock source as no external components are required. The IRC40K RC oscillator can be
switched on or off by setting the IRC40KEN bit in the Reset source/clock register,
RCU_RSTSCK. The IRC40KSTB flag in the reset source/clock register RCU_RSTSCK will
indicate if the IRC40K clock is stable. An interrupt can be generated if the related interrupt
enable bit IRC40KSTBIE in the interrupt register RCU_INT is set when the IRC40K becomes
stable.