GD32F20x User Manual
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17.
Real-time Clock(RTC)
17.1.
Overview
The RTC is usually used as a clock-calendar. The RTC circuits are located in two power
supply domains, backup domain and VDD domain. The ones in the Backup Domain consist
of a 32-bit up-counter, an alarm, a prescaler, a divider and the RTC clock configuration
register. It means the RTC settings and time are kept when the device resets or wakes up
from Standby mode. While the circuits in the VDD domain only include the APB interface
、
CTL and INTEN register. In the following sections, the details of the RTC function will be
described.
17.2.
Characteristics
32-bit programmable counter for counting elapsed time
Programmable prescaler: Max division factor is up to 2
20
Separate clock domains
:
A) PCLK1 clock domain
B) RTC clock domain (this clock must be at least 4 times slower than the PCLK1 clock)
RTC clock source
:
A) HXTAL clock divided by 128
B) LXTAL oscillator clock
C) IRC40K oscillator clock
Maskable interrupt source:
A) Alarm interrupt
B) Second interrupt
C) Overflow interrupt
17.3.
Function overview
The RTC circuits consist of two major units: APB interface located in PCLK1 clock domain
and RTC core located in RTC clock domain.
APB Interface is connected with the APB1 bus. It includes a set of registers, can be accessed
by APB1 bus.
RTC core includes two major blocks. One is the RTC prescaler block, which generates the
RTC time base clock SC_CLK. RTC prescaler block includes a 20-bit programmable divider
(RTC prescaler) which can lead that SC_CLK is divided from RTC source clock. If second
interrupt is enabled in the RTC_INTEN register, the RTC will generate an interrupt at every
SC_CLK rising edge. Another block is a 32-bit programmable counter, which can be initialized
Summary of Contents for GD32F20 Series
Page 191: ...GD32F20x User Manual 191 Bits Fields Descriptions 31 0 TRNDATA 31 0 32 Bit Random data ...
Page 290: ...GD32F20x User Manual 290 conversion is ongoing ...
Page 325: ...GD32F20x User Manual 325 15 0 ALRM 15 0 RTC alarm value low ...
Page 385: ...GD32F20x User Manual 385 ...
Page 523: ...GD32F20x User Manual 523 clears AERR bit by writing 0 to it ...