Analog Devices ADSP-BF59x Blackfin, Hardware Reference Manual, Page: 689 / 772

ADSP-BF59x Blackfin Processor Hardware Reference 16-67
System Reset and Booting
routine. The
BFLAG_TYPE
then tells the boot kernel what addressing mode
is required for the SPI memory. (see “SPI Device Detection Routine” on
page 16-42 ). The
BFLAG_FASTREAD
flag controls whether standard SPI read
(0x3 command) or fast read (0xB) is performed. The three lower bits of
the
dFlags
word are translated by the boot kernel into specific values to
the
SPI1_BAUD
registers. This follows the truth table shown in Table 16-7
on page 16-42 .
When called with the
BFLAG_ALTERNATE
flag, the
bfrom_SpiBoot()
func-
tion attempts to boot from external SPI memory device. Unless the
uwSsel
variable in the
ADI_BOOT_DATA
structure is altered by a hook routine, the
memory is expected to be connected to
SPI0_SSEL2
. A pull-up resistor on
this signal is required when automatic device detection is desired.
The
bfrom_SpiBoot()
routine does not deal with port muxing at all.
When a part has been booted via SPI master mode after reset, the port
muxing configuration is typically already ready for a runtime call to the
bfrom_SpiBoot()
routine. Otherwise ensure that the
SPIx_MISO
,
SPIx_MOSI
and
SPIx_SCK
signals are properly activated in the
PORTx_FER
and
PORTx_MUX
registers. The
SPI0_SSEL2
signal requires, however, that
the respective
PORTx_FER
bit be cleared, as the boot kernel toggles the sig-
nal in GPIO mode.
Similarly, the user shall set the
PG11
bit in the
PORTF_FER
register when
booting from an external device.
The
bfrom_SpiBoot()
routine uses the MDMA0 memory DMA channel
pair and the DMA7 peripheral DMA. Respective wake-up bits must be set
in the
SIC_IWRx
registers. If a different peripheral DMA channel has been
assigned to the SPI0 controller, use the hook routine to store the MMR
address of the respective
DMAx_CONFIG
register into the
pDmaControlRegis-
ter
variable in the
ADI_BOOT_DATA
structure. Similarly, when using a
different SPI controller than SPI0, write the MMR address of the relevant
SPIx_CTL
register into the
pControlRegister
variable.