Analog Devices ADSP-BF59x Blackfin, Hardware Reference Manual, Page: 164 / 772

DMA Registers
5-64 ADSP-BF59x Blackfin Processor Hardware Reference
Channel-specific register names are composed of a prefix and the generic
MMR name shown in
Table 5-6 . For peripheral DMA channels the prefix
“DMAx_” is used, where “x” stands for a channel number between 0 and
11. For memory DMA channels, the prefix is “MDMA_yy_”, where “yy”
stands for either “D0”, “S0”, “D1”, or “S1” to indicate destination and
source channel registers of MDMA0 and MDMA1. For example the
peripheral DMA channel 6 configuration register is called
DMA6_CONFIG
.
The register for the MDMA1 source channel is called
MDMA_S1_CONFIG
.

The generic MMR names shown in Table 5-6 are not actually
mapped to resources in the processor.
For convenience, discussions in this chapter use generic
(non-peripheral specific) DMA and memory DMA register names.
0x2C
PERIPHERAL_MAP
Peripheral to DMA channel
mapping contains a 4-bit
value specifying the periph-
eral associated with this DMA
channel (read-only for
MDMA channels) Control/
Status N/A
0x30
CURR_X_COUNT
Current count (1-D) or
intra-row X count (2-D);
counts down from
X_COUNT Current N/A
0x34 Reserved Reserved
0x38
CURR_Y_COUNT
Current row count (2-D
only); counts down from
Y_COUNT Current N/A
0x3C Reserved Reserved
Table 5-6. Generic Names of the DMA Memory-mapped
Registers (Continued)
MMR
Offset Generic MMR
Name MMR Description Register
Category Name of
Corresponding
Descriptor Element in
Memory