Analog Devices ADSP-BF59x Blackfin, Hardware Reference Manual, Page: 414 / 772

Functional Description
12-16 ADSP-BF59x Blackfin Processor Hardware Reference
This interrupt was generated because all data has been transferred
(
DCNT
= 0). If no errors were generated, a start condition is initi-
ated. Clear the
RSTART
bit and program the
DCNT
with the desired
number of bytes to receive.
•
RCVSERV
interrupt
This interrupt is generated due to the arrival of a byte in the receive
FIFO. Simple data handling is all that is required.
•
MCOMP
interrupt
The transfer is complete.
Receive/Transmit Repeated Start Sequence
Figure 12-8 on page 12-16 illustrates a repeated start data receive followed
by a data transmit sequence.
The tasks performed at each interrupt are:
•
RCVSERV
interrupt
This interrupt is generated due to the arrival of a data byte in the
receive FIFO. Set the
RSTART
bit to indicate a repeated start and
clear the
MDIR
bit if the following transfer will be a data transmit.
•
MCOMP
interrupt
Figure 12-8. Receive/Transmit Data Repeated Start
NACK ACK S S 8-BIT DATA
SHADING INDICATES SLAVE HAS THE BUS
7-BIT ADDRESS ACK P 8-BIT DATA ACK 7-BIT ADDRESS
MCOMP INTERRUPT
RCVSERV INTERRUPT
XMTSERV INTERRUPT
MCOMP INTERRUPT
R/W R/W