Analog Devices ADSP-BF59x Blackfin, Hardware Reference Manual, Page: 112 / 772

Modes of Operation
5-12 ADSP-BF59x Blackfin Processor Hardware Reference
The start address and modify values are in bytes, and they must be aligned
to a multiple of the DMA transfer word size (
WDSIZE[1:0]
in
DMAx_CONFIG
). Misalignment causes a DMA error.
The
DMAx_X_MODIFY
value is the byte-address increment that is applied
after each transfer that decrements the
DMAx_CURR_X_COUNT
register. The
DMAx_X_MODIFY
value is not applied when the inner loop count is ended by
decrementing
DMAx_CURR_X_COUNT
from 1 to 0, except that it is applied on
the final transfer when
DMAx_CURR_Y_COUNT
is 1 and
DMAx_CURR_X_COUNT
decrements from 1 to 0.
The
DMAx_Y_MODIFY
value is the byte-address increment that is applied
after each decrement of the
DMAx_CURR_Y_COUNT
register. However, the
DMAx_Y_MODIFY
value is not applied to the last item in the array on which
the outer loop count (
DMAx_CURR_Y_COUNT
) also expires by decrementing
from 1 to 0.
After the last transfer completes,
DMAx_CURR_Y_COUNT
= 1,
DMAx_CURR_X_COUNT
= 0, and
DMAx_CURR_ADDR
is equal to the last item’s
address plus
DMAx_X_MODIFY
.

If the DMA channel is programmed to refresh automatically (auto-
buffer mode), then these registers will be loaded from
DMAx_X_COUNT
,
DMAx_Y_COUNT
, and
DMAx_START_ADDR
upon the first
data transfer.
The
DI_SEL
configuration bit enables DMA interrupt requests every time
the inner loop rolls over. If
DI_SEL
is cleared, but
DI_EN
is still set, only
one interrupt is generated after the outer loop completes.
Examples of Two-Dimensional DMA
Example 1: Retrieve a 16 × 8 block of bytes from a video frame buffer of
size (N × M) pixels:
DMAx_X_MODIFY = 1
DMAx_X_COUNT = 16