Analog Devices ADSP-BF59x Blackfin, Hardware Reference Manual, Page: 157 / 772

ADSP-BF59x Blackfin Processor Hardware Reference 5-57
Direct Memory Access
There are two general methods for managing a descriptor queue using
interrupts:
• Interrupt on every descriptor
• Interrupt minimally - only on the last descriptor
Descriptor Queue Using Interrupts on Every Descriptor
In this system, the DMA manager software synchronizes with the DMA
unit by enabling an interrupt on every descriptor. This method should
only be used if system design can guarantee that each interrupt event will
be serviced separately (no interrupt overrun).
To maintain synchronization of the descriptor queue, the non-interrupt
software maintains a count of descriptors added to the queue, while the
interrupt handler maintains a count of completed descriptors removed
from the queue. The counts are equal only when the DMA channel is
paused after having processed all the descriptors.
When each new work request is received, the DMA manager software ini-
tializes a new descriptor, taking care to write a
DMAx_CONFIG
value with a
FLOW
value of 0. Next, the software compares the descriptor counts to
determine if the DMA channel is running or not. If the DMA channel is
paused (counts are equal), the software increments its count and then
starts the DMA unit by writing the new descriptor’s
DMAx_CONFIG
value to
the DMA channel’s
DMAx_CONFIG
register.
If the counts are unequal, the software instead modifies the next-to-last
descriptor’s
DMAx_CONFIG
value so that its upper half (
FLOW
and
NDSIZE
)
now describes the newly queued descriptor. This operation does not dis-
rupt the DMA channel, provided the rest of the descriptor data structure
is initialized in advance. It is necessary, however, to synchronize the soft-
ware to the DMA to correctly determine whether the new or the old
DMAx_CONFIG
value was read by the DMA channel.