Analog Devices ADSP-BF59x Blackfin, Hardware Reference Manual, Page: 330 / 772

Programming Examples
8-52 ADSP-BF59x Blackfin Processor Hardware Reference
Listing 8-5 illustrates how two timers can generate two non-overlapping
clock pulses as typically required for break-before-make scenarios. Both
timers are running in
PWM_OUT
mode with
PERIOD_CNT
= 1 and
PULSE_HI
= 1.
Figure 8-23 explains how the signal waveform represented by the period P
and the pulse width W translates to timer period and width values.
Table 8-3 summarizes the register writes.
Figure 8-23. Non-Overlapping Clock Pulses
Table 8-3. Register Writes for Non-Overlapping Clock Pulses
Register Before Enable
After
Enable
At IRQ1 At IRQ2
TIMER5_PERIOD P/2
TIMER5_WIDTH P/2 - W/2 W/2 P/2 - W/2 W/2
TIMER4_PERIOD P P/2
TIMER4_WIDTH P - W/2 W/2 P/2 - W-2
TMR5
ENABLE IRQ1 IRQ2
P/2 - W/2
TMR4
IRQ3
W/2 W/2
W/2
W/2
P/2
P/2 P/2
P/2
P - W/2
P W