Analog Devices ADSP-BF59x Blackfin, Hardware Reference Manual, Page: 452 / 772

Programming Examples
12-54 ADSP-BF59x Blackfin Processor Hardware Reference
Function: _ TWI_ISRDescription: This ISR is executed when the
TWI controller detects a slave initiated transfer. After an
interrupt is serviced, its corresponding bit is cleared in the
TWI_INT_STAT register. This done by writing a 1 to the particular
bit position. All bits are write 1 to clear.
***********************************************************/
#include <defBF527.h>
/*BF527 is used here as an example—change as appropriate.*/
.GLOBAL _TWI_ISR;
.section L1_code;
_TWI_ISR:
/***********************************************************
read the source of the interrupt
***********************************************************/
R1 = W[P1 + LO(TWI_INT_STAT)](z);
/***********************************************************
Slave Transfer Initiated
***********************************************************/
CC = BITTST(R1, BITPOS(SINIT));
if ! CC JUMP RECEIVE;
R0 = SINIT (Z);
W[P1 + LO(TWI_INT_STAT)] = R0; /* clear interrupt source bit */
ssync;
/***********************************************************
Receive service
***********************************************************/
RECEIVE:
CC = BITTST(R1, BITPOS(RCVSERV));
if ! CC JUMP TRANSMIT;
R0 = W[P1 + LO(TWI_RCV_DATA8)] (Z); /* read data */
B[P2++] = R0; /* store bytes into a buffer pointed to by P2 */
R0 = RCVSERV(Z);
W[P1 + LO(TWI_INT_STAT)] = R0; /*clear interrupt source bit */