TC1796
System Units (Vol. 1 of 2)
Clock System and Control
User’s Manual
3-27
V2.0, 2007-07
Clock, V2.0
of the peripheral module is stopped when the suspend signal is asserted. If SPEN is set
to 0, the module does not react to the suspend request signal but continues its normal
operation. This feature allows each peripheral module to be adapted to the unique
requirements of the application being debugged. Setting SPEN bits is usually performed
by a debugger.
This feature is necessary because application requirements typically determine whether
on-chip modules should be stopped or left running when an application is suspended for
debugging. For example, a peripheral unit that is controlling the motion of an external
device through motors in most cases must not be stopped so as to prevent damage of
the external device due to the loss of control through the peripheral. On the other hand,
it makes sense to stop the system timer while the debugger is actively controlling the chip
because it should only count the time when the user’s application is running.
Note that it is never appropriate for application software to set the SPEN bit. The debug
suspend mode should only be set by a debug software. To guard against application
software accidently setting SPEN, bit SPEN is specially protected by the mask bit
SBWE. The SPEN bit can only be written if, during the same write operation, SBWE is
set, too. Application software should never set SBWE to 1. In this way, user software can
not accidentally alter the value of the SPEN bit that has been set by a debugger.
Note: The operation of the Watchdog Timer is always automatically stopped in debug
suspend mode.
Entering Disabled Mode
Software can request that a peripheral unit be put into Disabled Mode by setting DISR.
A module will also be put into Disabled Mode if the sleep mode is requested and the
module is configured to allow Sleep Mode.
In Secure Shut-off Mode, a module first finishes any operation in progress, then
proceeds with an orderly shut down. When all sub-components of the module are ready
to be shut down, the module signals its clock control unit, which turns off the clock to this
peripheral unit, that it is now ready for shut down. The status bit DISS is updated by the
peripheral unit accordingly.
The kernel logic of the peripheral unit and its FPI Bus interface must both perform shut-
down operations before the clock can be shut off in Secure Shut-off Mode. This is
performed as follows. The peripheral module’s FPI Bus interface provides an internal
acknowledge signal as soon as any current bus interface operation is finished. For
example, if there is a DMA write access to a peripheral in progress when a disable
request is detected, the access will be terminated correctly. Similarly, the peripheral’s
kernel provides an internal acknowledge signal when it has entered a stable state. The
clock control unit for that peripheral module shuts off the module’s clock when it receives
both acknowledge signals.
During emulation and debugging, it may be necessary to monitor the instantaneous state
of the machine – including all or most of its modules – at the moment a software
