TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual
13-32
V2.0, 2007-07
EBU, V2.0
3. The most significant four bits of the PLMB address (“main” segment address) are
compared to the most significant four bits of the BASE bit field. The result of the
comparison (1 if equal, otherwise 0) is fed to the OR gate.
4. The OR gate combines the result of the “main” and “alternate” segment comparisons
generates a 1 if the PLMB address is in the selected segment(s) for the region,
otherwise it generates 0. The output of the OR gate is fed to the final AND gate.
5. Bit 27 of the PLMB address is (unconditionally) compared with bit 15 of the BASE bit
field. The result of the comparison (1 if equal, otherwise 0) is fed to the final AND
gate.
6. The appropriate number of PLMB address bits from bit 26 downwards is compared
with the corresponding bits from bit field BASE bit 14 downwards. The number of bits
used for the comparison is controlled by the MASK bit field. The result of the
comparison (1 if the appropriate bits are equal, otherwise 0) is fed to the final AND
gate.
7. The comparator checks whether the access is a Burst Flash access of Type 0
(AGEN = 010
B
) or of Type 1 (AGEN = 101
B
). The output of the comparator is fed to
an OR gate.
8. The OR gate produces a 1 if the region is a read-only region (for example a Burst
Flash access) that is write-protected via the write bit. The output of the OR gate is fed
to a NAND gate.
9. The NAND gate delivers a 0 if a write is performed to a read-only region, and prevents
the region from being selected. The output of the NAND gate is fed to the final AND
gate.
10. The final AND gate delivers a 1 if a match occurs at the address comparison, and the
region x is enabled by REGENAB = 1, and the access is not a write access when the
region is defined as read-only access.
This address decoding scheme has the following effects:
•
The smallest possible address region is 2
12
bytes (4 Kbyte)
•
The largest possible address region is 2
27
bytes (128 Mbyte)
•
The start address of a region depends on the size of the region. It must be at an
address that is a multiple of the size of a region; for example, the smallest region can
be placed on any 4-Kbyte boundary, while the largest region can be placed on
8-Mbyte boundaries only.
shows the possible region sizes and start granularity, as determined by the
programming of the MASK bit field. The range of the offset address within such a region
is also given.
