TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual
24-12
V2.0, 2007-07
GPTA, V2.0
compensated or uncompensated PLL clock or can be the PLL clock of the other GPTA
module. The uncompensated PLL clock is useful in applications in which bursts (due to
acceleration) might disturb the filter function.
With a prescaled GPTA module clock, very long time filter time periods can be achieved.
Output Signal Splitting
Two output lines are provided by each FPC module as follows:
•
An trigger output signal SOTk, reporting a falling or rising signal edge on the FPC
input by a single
f
GPTA
clock pulse,
•
A level output signal SOLk, indicating the direction of the detected signal transition.
This signal-splitting scheme (pair of trigger and level output) provides subsequent PDL
and DCM cells with the information about an input signal transition in the same
f
GPTA
clock cycle. This feature avoids cascading a one clock delay per edge detection unit
implemented at the input of each subsequent cell.
shows the FPC output
signal splitting scheme.
Figure 24-5 FPC Output Splitting into Trigger and Level Information
MCT05914
f
GPTA
FPC Level
Output SOLk
FPC Trigger
Output SOTk
FPC Input
SINk
