TC1796
Peripheral Units (Vol. 2 of 2)
Asynchronous/Synchronous Serial Interface (ASC)
User’s Manual
19-12
V2.0, 2007-07
ASC, V2.0
19.1.5
Baud Rate Generation
The ASC has its own dedicated 13-bit baud rate generator with 13-bit reload capability,
allowing baud rate generation independent of other timers.
The baud rate generator is clocked with a clock (
f
DIV
) which is derived via a prescaler
from the ASC module clock
f
ASC
. The baud rate timer is counting downwards and can be
started or stopped through the baud rate generator run bit CON.R. Each underflow of the
timer generates one clock pulse to the serial channel. The timer is reloaded with the
value stored in its 13-bit reload register at each underflow. The resulting clock
f
BRT
is
again divided by a factor for the baud rate clock (÷ 16 in asynchronous operating modes
and ÷ 4 in synchronous operating mode). The prescaler is selected by the bits CON.BRS
and CON.FDE. In the asynchronous operating modes, a fractional divider prescaler unit
is available (in addition to the two fixed dividers) that allows selection of prescaler divider
ratios of n/512 with n = 0-511. Therefore, the baud rate of ASC is determined by the
module clock, the content of register FDV, the reload value in register BG, and the
operating mode (asynchronous or synchronous).
Register BG is the dual-function baud rate generator/reload register. Reading BG returns
the contents of the timer in bit field BR_VALUE (bits 31:13 return zero), while writing to
BG always updates the reload register (bits 31:13 are insignificant).
An auto-reload of the timer with the contents of the reload register is performed each time
BG is written to. However, if CON.R = 0 at the time the write operation to BG is
performed, the timer will not be reloaded until the first instruction cycle after CON.R = 1.
For a clean baud rate initialization, BG should only be written if CON.R = 0. If BG is
written with CON.R = 1, an unpredicted behavior of the ASC may occur during running
transmit or receive operations.