TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual
23-71
V2.0, 2007-07
MLI, V2.0
Transfer Window and a new data frame is sent back to the Local Controller. The MLI
move engine in the Local Controller’s receiver can be used to write the received data
to a defined location, e.g. to a memory location. Test software in the Local Controller
can check for correct setup, data consistency, MLI event handling, and correct
address handling in the Local and the Remote Controllers.
23.3.5
Delay Adjustment
The local MLI transmitter is measuring the number of TCLK clock cycles between
TVALID becoming 0 after a transmission and TREADY becoming 1 again. This time
represents the overall loop delay of the MLI connection. The loop delay is the time used
for signal propagation, input/output driver delay and remote receiver reaction. For
example, with slow drivers and a high load (due to long wires, etc.), the signals take a
longer time to propagate from the local transmitter to the remote receiver and back again
(READY-VALID control handshake). This delay (also visible when TVALID becomes 1
at the beginning of a frame) limits the maximum baud rate of an MLI connection, because
the answer of the receiver has to be detected by the transmitter with TREADY = 0 at the
end of the frame. The value measured after the end of the frame is indicated in bit field
TSTATR.RDC.
The receiver participates in the control handshake by changing its RREADY output as a
reaction to an incoming RVALID signal. For the transmitter, the TREADY input delivers
the information that a receiver is connected and that it is ready for reception (transfer only
starts if TREADY = 1). If a receiver is not able to handle the data or is not connected, the
TREADY line will not become low after TVALID becomes 1 (Non-Acknowledge).
In addition to this information, the MLI protocol offers the possibility to use the control
handshake also to indicate that the receiver has detected a parity error in the received
frame. If a correct frame has been received, the receiver immediately asserts
RREADY = 1 after the reception of a frame when detecting RVALID = 0. If the receiver
has detected a parity error, it waits for a programmable number of RCLK cycles before
setting RREADY = 1 again. This additional delay is defined by bit field RCR.DPE.
The transmitter measuring the delay and comparing it to a programmed value, it can
detect that the receiver has signaled a parity error by introducing the additional delay.
The compare value for the transmitter is programmed by bit field TCR.MDP. A measured
value of TSTATR.RDC above TCR.MDP is interpreted as parity error by the transmitter
(for parity error handling refer to
).
In the receiver, frames with parity error are ignored for data transfers and don’t lead to
internal move actions.
