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TC1796
Peripheral Units (Vol. 2 of 2)
Synchronous Serial Interface (SSC)
User’s Manual
20-22
V2.0, 2007-07
SSC, V2.1
A slave select output period always starts after a serial write operation to register TB.
With a TB write operation, all timing parameters stored in register SSOTC as well as the
SSOC register are latched and remain valid for the consecutive transmission. Following
that, SLSOn becomes active (low) for a number of SCLK cycles (leading delay cycles)
before the first bit of the serial data stream occurs at MTSR. After the transmission of the
data frame, SLSOx remains active (low) for a number of SCLK cycles (trailing delay
cycles) before it becomes inactive again. This inactive state of SLSOn is valid at least for
a number of SCLK cycles (inactive delay cycles) before a new chip select period can be
started.
Note: When operating in Master Mode with CON.PH = 1 and sampling data from a slave
device that becomes enabled by an SLSOx output, a leading delay of at least one
leading delay clock cycle should be selected. The reason is that with CON.PH = 1,
the first SCLK edge already latches the first data bit at MRST.
The three parameters of a chip select period are controlled by bit fields in the Slave
Select Output Timing Control Register SSOTC. Each of these bit fields can contain a
value from 0 to 3 defining delay cycles of 0 to 3 multiples of the
t
SCLK
shift clock period.
The three parameters are:
1. Number of leading delay cycles (
t
SLSOL
= SSOTC.LEAD
×
t
SCLK
)
2. Number of trailing delay cycles (
t
SLSOT
= SSOTC.TRAIL
×
t
SCLK
)
3. Number of inactive delay cycles (
t
SLSOI
= SSSOTC.INACT
×
t
SCLK
)
If SSOTC.INACT = 00
B
and register TB has already been loaded with the data for the
next data frame, the next chip select period is started with its leading delay phase without
SLSOn going inactive. If, in this case, TB has not been loaded in time with the data for
the next data frame, SLSOx becomes inactive again.
Slave Select Output Control
Each slave select output SLSOn can be enabled individually. When SSOC.OENn = 1,
SLSOn is enabled. Furthermore, active and inactive levels of the SLSOn outputs are
programmable. Bit SSOC.AOLn determines the state of the active level of SLSOn.
Figure 20-12 Slave Select Output Control Logic
MCA05787
SSOC.AOLn
0
SSOC.OENn
SLSOn
Slave Select
Output
Timing Control
SSOTC
0: inactive
1: active
1
0
1
0