TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual
24-157
V2.0, 2007-07
GPTA, V2.0
IPS
[21:19] rw
Input Line Selection for FPCk
IPS determines the signal input used for edge
detection.
000
B
Signal input SINk0 selected
001
B
Signal input SINk1 selected
010
B
Signal input SINk2 selected
011
B
Signal input SINk3 selected
100
B
Signal input SINk4 = GPTA module clock
f
GPTA
selected
101
B
Signal input SINk5 = preceding FPC output
SOLk-1 selected; SIN05 is connected to SOL5
11X
B
Reserved
CLK
[23:22] rw
Clock Selection for FPCk
CLK selects the clock signal used for edge detection.
00
B
CIock input line 0 selected
(GPTA module clock
f
GPTA
)
01
B
Clock bus line 1 selected (local PLL clock)
10
B
Clock bus line 2 selected
(prescaled) GPTA module clock
f
GPTA
or
PLL clock from other unit or
DCM 3 clock
11
B
Clock bus line 3 selected
DCM 2 clock or
PLL clock of other unit or
uncompensated PLL clock or
uncompensated PLL clock of other unit
RTG
24
rw
Reset Timer for FPCk on Glitch
0
B
Timer for FPCk is decremented on glitch
1
B
Timer for FPCk is cleared on glitch
This bit is effective in Delayed Debounce Filter Mode
only.
0
[31:25] r
Reserved
Read as 0; should be written with 0.
Field
Bits
Type Description
