TC1796
System Units (Vol. 1 of 2)
Peripheral Control Processor (PCP)
User’s Manual
11-46
V2.0, 2007-07
PCP, V2.0
11.7.6.2 PRAM Addressing
The PRAM is always addressed indirectly by the PCP. The normal address used is the
value of the R7.DPTR field (8 bits) concatenated with an immediate 6-bit offset value
encoded in the instruction, yielding a 14-bit word address. This enables access to
16 Kwords (64 Kbytes). Because R7.DPTR is part of a channel program’s context, a
channel program may alter the DPTR value at any time.
•
Effective PRAM Address[13:0] = <R7.DPTR> << 6 + #offset6
Instructions using this addressing mode are indicated through the “.PI” suffix.
To provide effective indexing into large tables or stores of data, an alternate form of
indirect addressing can also be used on load and store operations to PRAM. The value
of the DPTR field (8 bits) is concatenated with the least significant 6 bits of R[a], again
yielding a 14-bit word address. The most significant bits [31:6] of R[a] are ignored.
•
Effective PRAM Address[13:0] = <R7.DPTR> << 6 + <R[a][5:0]>
Instructions using this addressing mode are indicated through the “.P” suffix (load and
store only, LD.P and ST.P).
11.7.6.3 Bit Addressing
Single bits can be addressed in the PCP GPRs or in FPI Bus address locations. A 5-bit
value indicates the location of a bit in the register specified in the instruction. This bit
location is either given through an immediate value in the instruction or through the lower
five bits of a second register (indirect addressing).
•
Effective Bit Position[31:0] = #imm5
•
Effective Bit Position[31:0] = <R[a][5:0]>
The immediate bit addressing is used by instructions SET and CLR and their variants as
well as by INB.I and CHKB. Indirect bit addressing is used by the INB instruction only.
11.7.6.4 Flow Control Destination Addressing
The jump instructions are split into two groups: PC-relative jumps, and jumps to an
absolute address.
For PC-relative jumps, the destination address is a positive or negative offset from the
PC of the next instruction. The offset is either contained in the lower 16 bits of a register
(the upper 16 bits are ignored), or is given as immediate value of the instruction. The
immediate values are sign-extended to 16 bits. If the effective jump address is outside
the available CMEM area (or the jump address calculation caused an overflow), then a
PCP error condition has occurred.
•
Effective JUMP Address[15:0] = Signed(R[a][15:0]); +/- 32K instructions
•
Effective JUMP Address[15:0] = Sign-Extend(#offset10);
+/- 512 instructions
