Freescale Semiconductor PowerPC e500 Core, Reference Manual

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PowerPC e500 Core Family Reference Manual, Rev. 1
2-50 Freescale Semiconductor
Register Model
The SPEFSCR is shown in Figure 2-38 .
Table 2-35 describes the SPEFSCR bits.
SPR: 512 Access: Supervisor-only
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
R
SOVH OVH FGH FXH FINVH FDBZH FUNFH FOVFH — FINXS FINVS FDBZS FUNFS FOVFS
MODE
W
Reset 0 0 undefined 0 0 0 0 0 0 0 0 0 0 0 0
48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
R
SOV OV FG FX FINV FDBZ FUNF FOVF — FINXE FINVE FDBZE FUNFE FOVFE FRMC
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 2-38. Signal Processing and Embedded Floating-Point Status and Control
Register (SPEFSCR)
Table 2-35. SPEFSCR Field Descriptions
Bits Name Function
32 SOVH Summary integer overflow high. Set whenever an instruction (except mtspr ) sets OVH. SOVH remains set until
it is cleared by an mtspr instruction.
33 OVH Integer overflow high. An overflow occurred in the upper half of the register while executing an SPE integer
instruction.
34 FGH Embedded floating-point guard bit high. Floating-point guard bit from the upper half. The value is undefined if
the processor takes a floating-point exception due to input error, floating-point overflow, or floating-point
underflow.
35 FXH Embedded floating-point sticky bit high. Floating bit from the upper half. The value is undefined if the processor
takes a floating-point exception due to input error, floating-point overflow or floating-point underflow.
36 FINVH Embedded floating-point invalid operation error high. Set when an input value on the high side is a NaN, Inf, or
Denorm. Also set on a divide if both the dividend and divisor are zero.
37 FDBZH Embedded floating-point divide-by-zero error high. Set if the dividend is non-zero and the divisor is zero.
38 FUNFH Embedded floating-point underflow error high.
39 FOVFH Embedded floating-point overflow error high.
40–41 — Reserved, should be cleared.
42 FINXS Embedded floating-point inexact sticky. FINXS = FINXS | FGH | FXH | FG | FX.
43 FINVS Embedded floating-point invalid operation sticky. Location for software to use when implementing true IEEE
floating point.
44 FDBZS Embedded floating-point divide-by-zero sticky. FDBZS = FDBZS | FDBZH | FDBZ
45 FUNFS Embedded floating-point underflow sticky. Storage location for software to use when implementing true IEEE
floating point.
High-Word Error Bits Status Bits
Enable Bits