Simplified Mnemonics for PowerPC Instructions
PowerPC e500 Core Family Reference Manual, Rev. 1
Freescale Semiconductor
C-35
twgti r
A
,
SIMM
twi
8,r
A
,
SIMM
Trap immediate if greater than
twle r
A
,
SIMM
tw
20,r
A
,
SIMM
Trap if less than or equal
twlei r
A
,
SIMM
twi
20,r
A
,
SIMM
Trap immediate if less than or equal
twlge r
A
,
SIMM
tw
12,r
A
,
SIMM
Trap if logically greater than or equal
twlgei r
A
,
SIMM
twi
12,r
A
,
SIMM
Trap immediate if logically greater than or equal
twlgt r
A
,
SIMM
tw
1,r
A
,
SIMM
Trap if logically greater than
twlgti
r
A
,
SIMM
twi
1,r
A
,
SIMM
Trap immediate if logically greater than
twlle r
A
,
SIMM
tw
6,r
A
,
SIMM
Trap if logically less than or equal
twllei r
A
,
SIMM
twi
6,r
A
,
SIMM
Trap immediate if logically less than or equal
twllt r
A
,
SIMM
tw
2,r
A
,
SIMM
Trap if logically less than
twllti r
A
,
SIMM
twi
2,r
A
,
SIMM
Trap immediate if logically less than
twlng r
A
,
SIMM
tw
6,r
A
,
SIMM
Trap if logically not greater than
twlngi r
A
,
SIMM
twi
6,r
A
,
SIMM
Trap immediate if logically not greater than
twlnl r
A
,
SIMM
tw
5,r
A
,
SIMM
Trap if logically not less than
twlnli r
A
,
SIMM
twi
5,r
A
,
SIMM
Trap immediate if logically not less than
twlt r
A
,
SIMM
tw
16,r
A
,
SIMM
Trap if less than
twlti r
A
,
SIMM
twi
16,r
A
,
SIMM
Trap immediate if less than
twne r
A
,
SIMM
tw
24,r
A
,
SIMM
Trap if not equal
twnei r
A
,
SIMM
twi
24,r
A
,
SIMM
Trap immediate if not equal
twng r
A
,
SIMM
tw
20,r
A
,
SIMM
Trap if not greater than
twngi r
A
,
SIMM
twi
20,r
A
,
SIMM
Trap immediate if not greater than
twnl r
A
,
SIMM
tw
12,r
A
,
SIMM
Trap if not less than
twnli r
A
,
SIMM
twi
12,r
A
,
SIMM
Trap immediate if not less than
1
Simplified mnemonics for branch instructions that do not test a CR bit should not specify one; a programming error may
occur.
2
The value in the BI operand selects CR
n[2], the EQ bit.
3
Instructions for which B0 is either 12 (branch if condition true) or 4 (branch if condition false) do not depend on the CTR
value and can be alternately coded by incorporating the condition specified by the BI field, as described in
Section C.4.6,
“Simplified Mnemonics that Incorporate CR Conditions (Eliminates BO and Replaces BI with crS)
.”
4
The value in the BI operand selects CR
n[0], the LT bit.
5
The value in the BI operand selects CR
n[1], the GT bit.
6
The value in the BI operand selects CR
n[3], the SO bit.
Table C-29. Simplified Mnemonics (continued)
Simplified Mnemonic
Mnemonic
Instruction
Summary of Contents for PowerPC e500 Core
Page 1: ...PowerPC e500 Core Family Reference Manual Supports e500v1 e500v2 E500CORERM Rev 1 4 2005...
Page 36: ...PowerPC e500 Core Family Reference Manual Rev 1 xxxvi Freescale Semiconductor...
Page 38: ...PowerPC e500 Core Family Reference Manual Rev 1 Part I 2 Freescale Semiconductor...
Page 332: ...PowerPC e500 Core Family Reference Manual Rev 1 Part II 2 Freescale Semiconductor...
Page 530: ...Opcode Listings PowerPC e500 Core Family Reference Manual Rev 1 D 50 Freescale Semiconductor...
Page 534: ...PowerPC e500 Core Family Reference Manual Rev 1 E 4 Freescale Semiconductor Revision History...