Freescale Semiconductor PowerPC e500 Core, Reference Manual

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PowerPC e500 Core Family Reference Manual, Rev. 1
C-8 Freescale Semiconductor
Simplified Mnemonics for PowerPC Instructions
Examples of branch prediction follow:
1. Branch if CR0 reflects less than condition, specifying that the branch should be predicted
as taken.
blt+ target
2. Same as (1), but target address is in the LR and the branch should be predicted as not
taken.
bltlr–
C.4.4 The BI Operand—CR Bit and Field Representations
With standard branch mnemonics, the BI operand is used when it is necessary to test a CR bit, as
shown in the example in
Section C.4, “Branch Instruction Simplified Mnemonics ,”
With simplified mnemonics, the BI operand is handled differently depending on whether the
simplified mnemonic incorporates a CR condition to test, as follows:
• Some branch simplified mnemonics incorporate only the BO operand. These simplified
mnemonics can use the architecturally defined BI operand to specify the CR bit, as follows:
— The BI operand can be presented exactly as it is with standard mnemonics—as a
decimal number, 0–31.
— Symbols can be used to replace the decimal operand, as shown in the example in
Section C.4, “Branch Instruction Simplified Mnemonics ,” where bdnzt 4 * cr5 +
eq,target could be used instead of bdnzt 22,target. This is described in
Section C.4.4.1.1, “Specifying a CR Bit .”
The simplified mnemonics in Section C.4.5, “Simplified Mnemonics that Incorporate the
BO Operand ,” use one of these two methods to specify a CR bit.
• Additional simplified mnemonics are specified that incorporate CR conditions that would
otherwise be specified by the BI operand, so the BI operand is replaced by the crS operand
to specify the CR field, CR0–CR7. See
Section C.4.4.1, “BI Operand Instruction
Encoding .”
These mnemonics are described in Section C.4.6, “Simplified Mnemonics that Incorporate
CR Conditions (Eliminates BO and Replaces BI with crS) .”
C.4.4.1 BI Operand Instruction Encoding
The entire 5-bit BI field, shown in Figure C-3 , represents the bit number for the CR bit to be tested.
For standard branch mnemonics and for branch simplified mnemonics that do not incorporate a
CR condition, the BI operand provides all 5 bits.
For simplified branch mnemonics described in Section C.4.6, “Simplified Mnemonics that
Incorporate CR Conditions (Eliminates BO and Replaces BI with crS) ,” the BI operand is