PowerPC e500 Core Family Reference Manual, Rev. 1
4-20
Freescale Semiconductor
Execution Timing
4.4.1.2
BTB Branch Prediction and Resolution
The e500 dynamic branch prediction mechanism differs from its predecessors in that branches are
detected and predicted earlier, in the two fetch stages. This processor-specific hardware
mechanism monitors and records branch instruction behavior, from which the next occurrence of
the branch instruction is predicted.
The e500 does not support static branch prediction—the BO prediction in branch instructions is
ignored.
The valid bit in each BTB entry is zero (invalid) at reset. When a branch instruction first enters the
instruction pipeline, it is not allocated in the BTB and so by default is predicted as not taken. If the
branch is not taken, nothing is allocated in the BTB. If it is taken, the misprediction allocates a
BTB entry for this branch with an initial prediction of strongly taken, as is shown in the example
in
Table 4-6
.
Figure 4-7. Updating Branch History
Note that unconditional branches are allocated in the BTB the first time they are encountered. This
example shows how the prediction is updated depending on whether a branch is taken.
The BPU detects whether a fetch group includes any branches that hit in the BTB, and if so,
determines the fetching path based on the prediction and the target address.
If the prediction is wrong, subsequent instructions and their results are purged. Instructions ahead
of the predicted branch proceed normally, instruction fetching resumes along the correct path, and
the history bits are revised.
The number of speculative branches that have not yet been allocated (and are predicted as not taken)
is limited only by the space available in the pipeline (the branch execute unit, the BIQ, and the IQ).
The presence of speculative branches allocated in the BTB slightly reduces speculation depth.
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Default: not taken
(no BTB entry is allocated until branch is taken)
(BTB allocated)
First mispredict
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Branch not taken
Branch not taken
Branch not taken
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Strongly not taken
Weakly not taken
Weakly taken
Strongly taken
00
01
10
11
Branch not taken
Branch taken
Branch not taken
Not taken
Summary of Contents for PowerPC e500 Core
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