Freescale Semiconductor PowerPC e500 Core, Reference Manual

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PowerPC e500 Core Family Reference Manual, Rev. 1
Freescale Semiconductor 13-1
Chapter 13
Core Complex Bus (CCB)
This chapter provides a very general description of the core complex bus (CCB), which is the
interface between the core and the integrating device. Because most of the behavior of the CCB is
not directly programmable, or even visible, to the user, this chapter does not attempt to describe
all aspects of the CCB or even the most important CCB signals.
Instead it describes only those aspects of the CCB that are configurable or that provide status
information through the programming interface. It provides a glossary of those signals that are
mentioned in other chapters to offer a clearer understanding of how the core is integrated as part
of a larger device.
13.1 Overview
The CCB is the internal interface of the core complex and is derived from the 60x bus. The CCB
allows a wide range of system-performance and system-complexity trade-offs, which are largely
configured by the device that integrates the core. The CCB is defined as follows:
• High-speed, on-chip local bus interface
• 32-bit address bus
• Address protocol with address pipelining and retry/copyback derived from bus used by
previous generations of PowerPC processors (referred to as the 60x bus)
• An address-out bus for mastering bus transactions
• An address-in bus for snooping internal resources
• Three tagged data buses
Two of the data buses are general-purpose data-in buses for reads, and the third is a data-out bus
for writes. The two data-in buses feature support for out-of-order read transactions from two
different sources simultaneously, and all three data buses may be operated concurrently. The
address-in bus supports snooping for external management of the L1 caches and TLBs by other
bus masters. The core complex broadcasts and snoops the cache and TLB management
instructions accordingly. It is envisioned that a wide range of system implementations can be
constructed from the defined interface.
The CCB derivation starts with the 60x bus, separates the bidirectional pins into unidirectional
components (for system-on-chip use), and adds new attributes and capabilities to enhance data
flow implementation or parallelism in certain system configurations. Note that this chapter does