Freescale Semiconductor PowerPC e500 Core, Reference Manual

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PowerPC e500 Core Family Reference Manual, Rev. 1
3-66 Freescale Semiconductor
Instruction Model
3.10 Instruction Listing
Table 3-44 lists instructions defined in Book E, in the PowerPC architecture, and in the e500. A
check mark (
√
) or text in a column indicates that the instruction is defined or implemented. The
e500-specific instructions are indicated in the e500 column by the name of the facility (BTB
locking, SPE APU, cache locking) that defines the instruction.
Table 3-44. List of Instructions
Mnemonic Book E PowerPC AIM e500 Mnemonic Book E PowerPC AIM e500
addc [ o ][ . ]
√ √ √
evmwsmiaa SPE APU
adde [ o ][ . ]
√ √ √
evmwsmian SPE APU
addi
√ √ √
evmwssf SPE APU
addic [ . ]
√ √ √
evmwssfa SPE APU
addis
√ √ √
evmwssfaa SPE APU
addme [ o ][ . ]
√ √ √
evmwssfan SPE APU
add [ o ] . ]
√ √ √
evmwumi SPE APU
addze [ o ][ . ]
√ √ √
evmwumia SPE APU
andc [ . ]
√ √ √
evmwumiaa SPE APU
andi.
√ √ √
evmwumian SPE APU
andis.
√ √ √
evnand SPE APU
and [ . ]
√ √ √
evneg SPE APU
b
√ √ √
evnor SPE APU
ba
√ √ √
evor SPE APU
bbelr BTB evorc SPE APU
bblels BTB evrlw SPE APU
bc
√ √ √
evrlwi SPE APU
bca
√ √ √
evrndw SPE APU
bcctr
√ √ √
evsel SPE APU
bcctrl
√ √ √
evslw SPE APU
bcl
√ √ √
evslwi SPE APU
bcla
√ √ √
evsplatfi SPE APU
bclr
√ √ √
evsplati SPE APU
bclrl
√ √ √
evsrwis SPE APU
bl
√ √ √
evsrwiu SPE APU
bla
√ √ √
evsrws SPE APU
brinc SPE APU evsrwu SPE APU
cmp
√ √ √
evstdd SPE APU
cmpi
√ √ √
evstddx SPE APU
cmpl
√ √ √
evstdh SPE APU
cmpli
√ √ √
evstdhx SPE APU
cntlzw [ . ]
√ √ √
evstdw SPE APU
crand
√ √ √
evstdwx SPE APU