PowerPC e500 Core Family Reference Manual, Rev. 1
7-12
Freescale Semiconductor
Performance Monitor
overflow generation, the chained counter increments each time the first counter rolls over to zero.
Multiple counters may be chained together.
Because the entire chained value cannot be read in a single instruction, an overflow may occur
between counter reads, producing an inaccurate value. A sequence like the following is necessary
to read the complete chained value when it spans multiple counters and the counters are not frozen.
The example shown is for a two-counter case.
loop:
mfpmr
Rx,pmctr1
#load from upper counter
mfpmr
Ry,pmctr0
#load from lower counter
mfpmr
Rz,pmctr1
#load from upper counter
cmp
cr0,0,Rz,Rx
#see if ‘old’ = ‘new’
bc
4,2,loop
#loop if carry occurred between reads
The comparison and loop are necessary to ensure that a consistent set of values has been obtained.
The above sequence is not necessary if the counters are frozen.
7.6.2
Thresholding
Threshold event measurement enables the counting of duration and usage events. For example,
data line fill buffer (DLFB) load miss cycles (event C0:76 and C1:76) require a threshold value.
A DLFB load miss cycles event is counted only when the number of cycles spent recovering from
the miss is greater than the threshold. Because this event is counted on two counters and each
counter has an individual threshold, one execution of a performance monitor program can sample
two different threshold values. Measuring code performance with multiple concurrent thresholds
expedites code profiling significantly.
7.7
Event Selection
Event selection is specified through the PMLCan registers described in
Section 7.2.3, “Local
Control A Registers (PMLCa0–PMLCa3)
.” The event-select fields in PMLCan[EVENT] are
described in
Table 7-10
, which lists encodings for the selectable events to be monitored.
Table 7-10
establishes a correlation between each counter, events to be traced, and the pattern
required for the desired selection.
The Spec/Nonspec column indicates whether the event count includes any occurrences due to
processing that was not architecturally required by the PowerPC sequential execution model
(speculative processing).
•
Speculative counts include speculative instructions that were later flushed.
•
Nonspeculative counts do not include speculative operations, which are flushed.
Summary of Contents for PowerPC e500 Core
Page 1: ...PowerPC e500 Core Family Reference Manual Supports e500v1 e500v2 E500CORERM Rev 1 4 2005...
Page 36: ...PowerPC e500 Core Family Reference Manual Rev 1 xxxvi Freescale Semiconductor...
Page 38: ...PowerPC e500 Core Family Reference Manual Rev 1 Part I 2 Freescale Semiconductor...
Page 332: ...PowerPC e500 Core Family Reference Manual Rev 1 Part II 2 Freescale Semiconductor...
Page 530: ...Opcode Listings PowerPC e500 Core Family Reference Manual Rev 1 D 50 Freescale Semiconductor...
Page 534: ...PowerPC e500 Core Family Reference Manual Rev 1 E 4 Freescale Semiconductor Revision History...