Simplified Mnemonics for PowerPC Instructions
PowerPC e500 Core Family Reference Manual, Rev. 1
Freescale Semiconductor
C-7
C.4.3
Incorporating the BO Branch Prediction
As shown in
Table C-6
, the low-order bit (y bit) of the BO field provides a hint about whether the
branch is likely to be taken (static branch prediction). Assemblers should clear this bit unless
otherwise directed. This default action indicates the following:
•
A branch conditional with a negative displacement field is predicted to be taken.
•
A branch conditional with a non-negative displacement field is predicted not to be taken
(fall through).
•
A branch conditional to an address in the LR or CTR is predicted not to be taken (fall
through).
If the likely outcome (branch or fall through) of a given branch conditional instruction is known,
a suffix can be added to the mnemonic that tells the assembler how to set the y bit. That is, ‘+’
indicates that the branch is to be taken and ‘–’ indicates that the branch is not to be taken. This
suffix can be added to any branch conditional mnemonic, either standard or simplified.
For relative and absolute branches (bc[l][a]), the setting of the y bit depends on whether the
displacement field is negative or non-negative. For negative displacement fields, coding the suffix
‘+’ causes the bit to be cleared, and coding the suffix ‘–’ causes the bit to be set. For non-negative
displacement fields, coding the suffix ‘+’ causes the bit to be set, and coding the suffix ‘–’ causes
the bit to be cleared.
For branches to an address in the LR or CTR (bclr[l] or bcctr[l]), coding the suffix ‘+’ causes the
y bit to be set, and coding the suffix ‘–’ causes the bit to be cleared.
011
z
3
y
12
Branch if the condition is TRUE.
2
Note that ‘true’ and ‘twelve’ both start with ‘t’.
t
1
z 00y
4
16
Decrement the CTR, then branch if the decremented CTR
≠
0.
dnz
5
1
z01y
4
18
Decrement the CTR, then branch if the decremented CTR = 0.
dz
5
1
z 1zz
4
20
Branch always.
—
1
Assumes y = z = 0.
Section C.4.3, “Incorporating the BO Branch Prediction
,” describes how to use simplified
mnemonics to program the
y bit for static prediction.
2
Instructions for which B0 is 12 (branch if condition true) or 4 (branch if condition false) do not depend on the CTR
value and can be alternately coded by incorporating the condition specified by the BI field, as described in
Section C.4.6, “Simplified Mnemonics that Incorporate CR Conditions (Eliminates BO and Replaces BI with crS)
.”
3
A
z bit indicates a bit that is ignored. However, these bits should be cleared, as they may be assigned a meaning in
a future version of the architecture.
4
Simplified mnemonics for branch instructions that do not test CR bits (BO = 16, 18, and 20) should specify only a
target. Otherwise a programming error may occur.
5
Notice that these instructions do not use the branch if condition true or false operations. For that reason, simplified
mnemonics for these should not specify a BI operand.
Table C-6. BO Operand Encodings (continued)
BO Field
Value
1
(Decimal)
Description
Symbol
Summary of Contents for PowerPC e500 Core
Page 1: ...PowerPC e500 Core Family Reference Manual Supports e500v1 e500v2 E500CORERM Rev 1 4 2005...
Page 36: ...PowerPC e500 Core Family Reference Manual Rev 1 xxxvi Freescale Semiconductor...
Page 38: ...PowerPC e500 Core Family Reference Manual Rev 1 Part I 2 Freescale Semiconductor...
Page 332: ...PowerPC e500 Core Family Reference Manual Rev 1 Part II 2 Freescale Semiconductor...
Page 530: ...Opcode Listings PowerPC e500 Core Family Reference Manual Rev 1 D 50 Freescale Semiconductor...
Page 534: ...PowerPC e500 Core Family Reference Manual Rev 1 E 4 Freescale Semiconductor Revision History...