Freescale Semiconductor PowerPC e500 Core, Reference Manual

Page: 454 / 548

PowerPC e500 Core Family Reference Manual, Rev. 1
C-10 Freescale Semiconductor
Simplified Mnemonics for PowerPC Instructions
To provide simplified mnemonics for every possible combination of BO and BI (that is, including
bits that identified the CR field) would require 2
10
= 1024 mnemonics, most of which would be
only marginally useful. The abbreviated set in Section C.4.5, “Simplified Mnemonics that
Incorporate the BO Operand ,” covers useful cases. Unusual cases can be coded using a standard
branch conditional syntax.
C.4.4.1.2 The crS Operand
The crS symbols are shown in Table C-9 . Note that either the symbol or the operand value can be
used in the syntax used with the simplified mnemonic.
Table C-8. BI Operand Settings for CR Fields for Branch Comparisons
CR n
Bit
Bit Expression
CR Bits BI
Description
AIM (BI
Operand)
Book E 0–2 3–4
CR n[0] 4 * cr0 + lt (or lt )
4 * cr1 + lt
4 * cr2 + lt
4 * cr3+ lt
4 * cr4 + lt
4 * cr5 + lt
4 * cr6 + lt
4 * cr7 + lt
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60 000
001
010
011
100
101
110
111 00 Less than (LT).
For integer compare instructions:
r A < SIMM or r B (signed comparison) or r A <
UIMM or r B (unsigned comparison).
CR n[1] 4 * cr0 + gt (or gt )
4 * cr1 + gt
4 * cr2 + gt
4 * cr3+ gt
4 * cr4 + gt
4 * cr5 + gt
4 * cr6 + gt
4 * cr7 + gt
1
5
9
13
17
21
25
29
33
37
41
45
49
53
57
61 000
001
010
011
100
101
110
111 01 Greater than (GT).
For integer compare instructions:
rA > SIMM or rB (signed comparison) or
r A >
UIMM or r B (unsigned comparison).
CR n[2] 4 * cr0 + eq (or eq )
4 * cr1 + eq
4 * cr2 + eq
4 * cr3+ eq
4 * cr4 + eq
4 * cr5 + eq
4 * cr6 + eq
4 * cr7 + eq
2
6
10
14
18
22
26
30
34
38
42
46
50
54
58
62 000
001
010
011
100
101
110
111 10 Equal (EQ).
For integer compare instructions:
r A = SIMM,
UIMM, or r B.
CR n[3] 4 * cr0 + so / un (or so / un )
4 * cr1 + so / un
4 * cr2 + so / un
4 * cr3 + so / un
4 * cr4 + so / un
4 * cr5 + so / un
4 * cr6 + so / un
4 * cr7 + so / un
3
7
11
15
19
23
27
31
35
39
43
47
51
55
59
63 000
001
010
011
100
101
110
111 11 Summary overflow (SO).
For integer compare instructions, this is a copy of
XER[SO] at instruction completion.