Register Model
PowerPC e500 Core Family Reference Manual, Rev. 1
Freescale Semiconductor
2-41
2.12.5.2 MAS Register 1 (MAS1)
Figure 2-30
describes the format of MAS1. Note that while the Freescale Book E allows for a TID
field of 12 bits, the TID field on the core complex is implemented as only 8 bits. Writing to MAS1
requires synchronization, as described in
Section 2.16, “Synchronization Requirements for
SPRs.”
The MAS1 fields are described in
Table 2-25
.
SPR 625
Access: Supervisor-only
32
33
34
39 40
47 48
50
51
52
55 56
63
R
V IPROT
—
TID
—
TS
TSIZE
—
W
Reset
All zeros
Figure 2-30. MAS Register 1 (MAS1)
Table 2-25. MAS1 Field Descriptions—Descriptor Context and Configuration Control
Bits
Name
Descriptions
32
V
TLB valid bit.
0 This TLB entry is invalid.
1 This TLB entry is valid.
33
IPROT Invalidate protect. Set to protect this TLB entry from invalidate operations due the execution of
tlbivax
(TLB1
only). Note that not all TLB arrays are necessarily protected from invalidation with IPROT. Arrays that support
invalidate protection are denoted as such in the TLB configuration registers.
0 Entry is not protected from invalidation.
1 Entry is protected from invalidation.
34–39
—
Reserved, should be cleared.
40–47
TID
Translation identity. Defines the process ID for this TLB entry. TID is compared with the current process IDs
of the three effective address to be translated. A TID value of 0 defines an entry as global and matches with
all process IDs.
48–50
—
Reserved, should be cleared.
51
TS
Translation space. Compared with the IS or DS fields of the MSR (depending on the type of access) to
determine if this TLB entry may be used for translation.
52–55
TSIZE
Translation size. Defines the page size of the TLB entry. For TLB arrays that contain fixed-size TLB entries,
this field is ignored. For variable page size TLB arrays, the page size is 4
TSIZE
Kbytes. Note that although the
Freescale Book E standard supports all 16 page sizes defined in Book E, the e500 only supports the following
page sizes:
0001 4 Kbyte
0010 16 Kbyte
0011 64 Kbyte
0100 256 Kbyte
0101 1 Mbyte
0110 4 Mbyte
0111 16 Mbyte
1000 64 Mbyte
1001 256 Mbyte
1010 1 Gbyte
1011 4 Gbyte
56–63
—
Reserved, should be cleared.
Summary of Contents for PowerPC e500 Core
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