CHAPTER 11 SERIAL INTERFACE FUNCTION
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User’s Manual U14359EJ4V0UM
11.3 Clocked Serial Interfaces 0 to 2 (CSI0 to CSI2)
11.3.1 Features
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Transfer rate: Master mode: Maximum 3.125 Mbps (when internal system clock operates at 50 MHz)
Slave mode:
Maximum 5 Mbps
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Half-duplex communications
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Master mode and slave mode can be selected
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Transmission data length: 8 bits
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Transfer data direction can be switched between MSB first and LSB first
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Eight clock signals can be selected (7 master clocks and 1 slave clock)
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3-wire method
SOn:
Serial data output
SIn:
Serial data input
SCKn:
Serial clock input/output
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Interrupt sources: 1 type
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Transmission/reception completion interrupt (INTCSIn)
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Transmission/reception mode or reception-only mode can be specified
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On-chip transmit buffer (SOTBn)
Remark
n = 0 to 2
11.3.2 Configuration
CSIn is controlled by the clocked serial interface mode register (CSIMn) (n = 0 to 2). Transmit/receive data can be
written to or read from the SIOn register.
(1) Clocked serial interface mode registers 0 to 2 (CSIM0 to CSIM2)
The CSIMn register is an 8-bit register for specifying the operation of CSIn.
(2) Clocked serial interface clock selection registers 0 to 2 (CSIC0 to CSIC2)
The CSICn register is an 8-bit register for controlling the transmit operation of CSIn.
(3) Serial I/O shift registers 0 to 2 (SIO0 to SIO2)
The SIOn register is an 8-bit register for converting between serial data and parallel data. SIOn is used for
both transmission and reception.
Data is shifted in (reception) or shifted out (transmission) beginning at either the MSB side or the LSB side.
Actual transmit/receive operations are controlled by reading or writing SIOn.
(4) Clocked serial interface transmit buffer registers 0 to 2 (SOTB0 to SOTB2)
The SOTBn register is an 8-bit buffer register for storing transmit data.
(5) Selector
The selector selects the serial clock to be used.
(6) Serial clock controller
The serial clock controller controls the supply of serial clocks to the shift register. When an internal clock is
used, it also controls the clocks that are output to the SCKn pin.