CHAPTER 1 INTRODUCTION
37
User’s Manual U14359EJ4V0UM
(3) ROM
The
µ
PD703105A and 703106A have 128 KB of on-chip mask ROM, the
µ
PD703107A has 256 KB of on-chip
mask ROM and the
µ
PD70F3107A has 256 KB of on-chip flash memory. The
µ
PD703103A does not include
on-chip ROM.
During instruction fetch, ROM/flash memory can be accessed from the CPU in 1-clock cycles.
If single-chip mode 0 or flash memory programming mode is set, memory mapping occurs from address
00000000H.
If single-chip mode 1 is set, memory mapping occurs from address 00100000H.
If ROMless mode is set, access is not possible.
(4) RAM
RAM is mapped from address FFFFC000H.
During instruction fetch or data access, data can be accessed from the CPU in 1-clock cycles.
(5) Interrupt controller (INTC)
This controller handles hardware interrupt requests (NMI, INTP0n0, INTP0n1, INTP1nn) from on-chip
peripheral I/O and external hardware (n = 0 to 3). Eight levels of interrupt priorities can be specified for these
interrupt requests, and multiple-interrupt servicing control can be performed for interrupt sources.
(6) Clock generator (CG)
This clock generator supplies frequencies which are 10 times the input clock (f
X
) (using an on-chip PLL) or
1/2 the input clock (when an on-chip PLL is not used) as the internal system clock (f
XX
). As the input clock,
an external oscillator is connected to pins X1 and X2 (only when an on-chip PLL synthesizer is used) or an
external clock is input from the X1 pin.
(7) Real-time pulse unit (RPU)
This unit incorporates a 4-channel 16-bit timer/event counter and 4-channel 16-bit interval timer, and can
measure pulse widths or frequency and output a programmable pulse.
(8) Serial interfaces (SIO)
The serial interfaces consist of 4 channels divided between an asynchronous serial interface (UART) and
clocked serial interface (CSI). Two of these channels can be switched between UART and CSI, one channel
is fixed to CSI, and the remaining channel is fixed to UART.
UART transfers data by using the TXDn and RXDn pins (n = 0 to 2).
CSI transfers data by using the SOn, SIn, and SCKn pins (n = 0 to 2).
(9) A/D converter (ADC)
This high-speed, high-resolution 10-bit A/D converter includes 8 analog input pins. Conversion is performed
using the successive approximation method.
(10) PWM
Two channels for PWM signal output of 8-/9-/10-/12-bit resolution have been provided. By connecting an
external low-pass filter, PWM output can be used as digital to analog conversion output. PWM is ideal for
actuator control signals such as those in motors.
