CHAPTER 6 DMA FUNCTIONS (DMA CONTROLLER)
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User’s Manual U14359EJ4V0UM
6.4
DMA Bus States
6.4.1 Types of bus states
The DMAC bus states consist of the following 13 states.
(1) TI state
The TI state is an idle state, during which no access request is issued.
The DMARQ0 to DMARQ3 signals are sampled at the rising edge of the CLKOUT signal.
(2) T0 state
DMA transfer ready state (state in which a DMA transfer request has been issued and the bus mastership is
acquired for the first DMA transfer).
(3) T1R state
The bus enters the T1R state at the beginning of a read operation in the 2-cycle transfer mode.
Address driving starts. After entering the T1R state, the bus invariably enters the T2R state.
(4) T1RI state
The T1RI state is a state in which the bus waits for the acknowledge signal corresponding to an external
memory read request.
After entering the last T1RI state, the bus invariably enters the T2R state.
(5) T2R state
The T2R state corresponds to the last state of a read operation in the 2-cycle transfer mode, or to a wait
state.
In the last T2R state, read data is sampled. After entering the last T2R state, the bus invariably enters the
T1W state.
(6) T2RI state
State in which the bus is ready for DMA transfer to on-chip peripheral I/O or internal RAM (state in which the
bus mastership is acquired for DMA transfer to on-chip peripheral I/O or internal RAM).
After entering the last T2RI state, the bus invariably enters the T1W state.
(7) T1W state
The bus enters the T1W state at the beginning of a write operation in the 2-cycle transfer mode.
Address driving starts. After entering the T1W state, the bus invariably enters the T2W state.
(8) T1WI state
State in which the bus waits for the acknowledge signal corresponding to an external memory write request.
After entering the last T1WI state, the bus invariably enters the T2W state.
(9) T2W state
The T2W state corresponds to the last state of a write operation in the 2-cycle transfer mode, or to a wait
state.
In the last T2W state, the write strobe signal is made inactive.
