CHAPTER 5 MEMORY ACCESS CONTROL FUNCTION
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User’s Manual U14359EJ4V0UM
5.4.5 SDRAM
access
During power-on or a refresh operation, the all bank precharge command is always issued for SDRAM. When
accessing SDRAM after that, therefore, the active command and read/write command are issued in that order (see
<1> in Figure 5-13).
If a page change occurs following this, the precharge command, active command, and read/write command are
issued in that order (see <2> in Figure 5-13).
If a bank change occurs, the active command and read/write command for the bank to be accessed next are
issued in that order. Following this read/write command, the precharge command for the bank that was accessed
before the bank currently being accessed will be issued (see <3> in Figure 5-13).
Figure 5-13. State Transition of SDRAM Access
<1>
<3>
<2>
All bank
pre-charge command
(Power on/refresh)
Bank A
active
command
Bank A
precharge
command
Bank A
active
command
Bank A
active
command
Bank B
active
command
Bank B
Read/Write
command
Bank A
Read/Write
command
Bank A
Read/Write
command
Read/Write
command
Read/Write
command
(On-page access)
(Page change)
(Bank change)
(Bank change)
Bank A precharge
command