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User’s Manual U14359EJ4V0UM
CHAPTER 12 A/D CONVERTER
12.1 Features
•
Analog input: 8 channels
•
10-bit A/D converter
•
On-chip A/D conversion result register (ADCR0 to ADCR7)
10 bits
×
8
•
A/D conversion trigger mode
A/D trigger mode
Timer trigger mode
External trigger mode
•
Successive approximation method
12.2 Configuration
The A/D converter of the V850E/MA1 adopts the successive approximation method, and uses A/D converter mode
registers 0, 1, 2 (ADM0, ADM1, ADM2), and the A/D conversion result register (ADCR0 to ADCR7) to perform A/D
conversion operations.
(1) Input circuit
The input circuit selects the analog input (ANI0 to ANI7) according to the mode set by the ADM0 and ADM1
registers and sends the input to the sample & hold circuit.
(2) Sample & hold circuit
The sample & hold circuit samples each of the analog input signals sequentially sent from the input circuit,
and sends them to the voltage comparator. This circuit also holds the sampled analog input signal during A/D
conversion.
(3) Voltage comparator
The voltage comparator compares the analog input signal with the output voltage of the series resistor string
voltage tap.
(4) Series resistor string
The series resistor string is used to generate voltages to match analog inputs.
The series resistor string is connected between the reference voltage pin (AV
REF
) for the A/D converter and
the GND pin (AV
SS
) for the A/D converter. To make 1,024 equal voltage steps between these 2 pins, it is
configured from 1,023 equal resistors and 2 resistors with 1/2 of the resistance value.
The voltage tap of the series resistor string is selected by a tap selector controlled by the successive
approximation register (SAR).
