CHAPTER 10 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)
User’s Manual U14359EJ4V0UM
330
(2/2)
Bit position
Bit name
Function
Count Enable Select
Selects the TMCn internal count clock (n = 0 to 3).
CSn2
CSn1
CSn0
Count cycle
0
0
0
f
XX
/4
0
0
1
f
XX
/8
0
1
0
f
XX
/16
0
1
1
f
XX
/32
1
0
0
f
XX
/64
1
0
1
f
XX
/128
1
1
0
f
XX
/256
1
1
1
f
XX
/512
6 to 4
CSn2 to CSn0
(n = 0 to 3)
Caution The CSn2 to CSn0 bits must not be changed during timer
operation. If they are to be changed, they must be changed after
setting the TMCCEn bit to 0. If these bits are overwritten during
timer operation, operation cannot be guaranteed.
Remark
f
XX
: Internal system clock
1
TMCCEn
(n = 0 to 3)
Count Enable
Controls the operation of TMCn (n = 0 to 3).
0: Count disabled (stops at 0000H and does not operate)
1: Counting operation is performed
Caution When TMCCEn = 0, the external pulse output (TO0n) becomes
inactive (the active level of TO0n output is set by the ACTLVn bit of
the TMCCn1 register).
0
TMCCAEn
(n = 0 to 3)
Clock Action Enable
Controls the internal count clock (n = 0 to 3).
0: The entire TMCn unit is asynchronously reset. The supply of clocks to
the TMCn unit stops.
1: Clocks are supplied to the TMCn unit
Cautions 1. When the TMCCAEn bit is set to 0, the TMCn unit can be
asynchronously reset.
2. When TMCCAEn = 0, the TMCn unit is in a reset state.
Therefore, to operate TMCn, the TMCCAEn bit must be set to 1.
3. When the TMCCAEn bit is changed from 1 to 0, all registers of
the TMCn unit are initialized. When TMCCAEn is set to 1 again,
the TMCn unit registers must be set again.